Registers
are memory size is very small with very high-speed access. Registers used to
store data and instructions are being processed, while that data and other
instructions waiting to be processed are stored in
main
memory. Registers in the CPU consists of:
1.
Instruction Register (IR) is used to store instructions that ar
processed.
2.
Program Counter (PC) is a register that is used to store the address
location of main memory containing the instruction being processed. during the
process progresses, the content is converted to PC main memory address
containing instructions The next to be processed. This makes it possible to
trace The next instruction in main memory.
3.
General-purpose registers, the registers that have a wide range of functions
associated with the data being processed. For example, if used for accommodate
the data being processed is referred to as the operand register, while if it is
used to hold the processed result is called the accumulator.
4.
Memory Data Register (MDR), which registers are used to hold data or
instructions sent from main memory to the CPU, or contain data that saved to
main memory as a result of CPU processing.
5.
Memory Address Register (MAR) is used to hold data or address
instructions on the main memory to be taken or to be placed
Registered
(also called buffered) memory modules have a register between the DRAM modules
and the system's memory controller. They place less electrical load on the
memory controller and allow single systems to remain stable with more memory
modules than they would have otherwise. Registered memory is often more
expensive because of the lower volume and the additional components, so it is
usually found only in applications where the need for scalability and stability
outweighs the need for a low price (servers, for example). Although most
server-grade memory modules are both ECC and registered, there are both
registered non-ECC modules and non-registered ECC modules.
Nominally,
there is a performance penalty for using registered memory. Each read or write
is buffered for one cycle between the memory bus and the DRAM, so the
registered RAM can be thought of as running one clock cycle behind the
equivalent unregistered DRAM. With SDRAM, this only applies to the first cycle
of a burst.
However,
this performance penalty is not universal. There are other factors involved in
memory access speed. For example, the Intel "Westmere" 5600 series of
processors access memory using interleaving, wherein memory access is
distributed across 3 channels. If 2 memory DIMMs are used per channel, this
"...results in a reduction of maximum memory bandwidth for 2DPC (DIMMs per
channel) configurations with UDIMM by some 5% in comparison to RDIMM." (p.
14). This is because "...when you go to 2 DIMMs per memory channel, due to
the high electrical loading on the address and control lines, the memory
controller use something called a “2T” or “2N” timing for UDIMMs. Consequently
every command that normally takes a single clock cycle is stretched to two
clock cycles to allow for settling time. Therefore, for two or more DIMMs per
channel, RDIMMs will have lower latency and better bandwidth than UDIMMs."
Buffered
memory
Buffered
memory is an older term for registered memory (It's actually different and
registered RAM won't fit in a standard slot, buffered refers to an electronic
buffer placed between the memory and the memory controller).
However,
some new large systems use "fully buffered memory". In normal
registered/buffered memory, only the control lines are buffered whereas in
fully buffered memory, the data lines are buffered as well.
TYPE OF REGISTER:
1. Registers are included in this group consists of registers CS, DS, ES and SS are respectively the 16-bitregisters. Registers in this group are generally used to indicate the address of a segment.
Register CS (Code Segment) is used to indicate the place of the current segment, while the SS register(Stack Segment) shows the location of the segments used by the stack. Both of these registers should not be any change because it would cause chaos in your program later.
Register DS (Data Segment) is usually used to show where the segment where the data is stored in theprogram. Generally the contents of these registers do not need to be changed unless the resident program.
Register ES (Extra Segment), as the name suggests is a bonus registers that do not have a specific task.ES registers areusually used to indicate an address in memory, eg video memory address.
On the 80386 processor segment registers are 16-bit addition, the FS<Extra Segment> and GS<Extra Segment>.
2. Pointer and Index Register.
Registers are included in this group are the registers SP, BP, SI and DI, each of which consists of 16 bits.Registers in this group are generally used as a pointer or a pointer to a location in memory.
Register SP (Stack Pointer) is paired with SS segment register (SS: SP) is used to mununjukkan address of the stack, while the register BP (Base Pointer) register is paired with SS (SS: BP) recorded an address inmemory where data.
Register SI (Source Index) and register DI (Destination Index) is usually used in a string operation with directaccess to the address in memory indicated by the two registers. On the 80386 processor there is an additional 32-bit registers, namely ESP, EBP, ESI and EDI.
3. General Purpose Register.
Registers are included in this group are the registers AX, BX, CX and DX, each of which consists of 16 bits.16-bit registers of this group have a characteristic, which can be separated into two parts where each partconsists of 8 bits.
+ A X + + B X + + C X + + D X +
+-+--+--+-+ +-+--+--+-+ +-+--+--+-+ +-+--+--+-+
| AH | AL | | BH | BL | | CH | CL | | DH | DL |
+---- +---- + +---- +---- + +-----+----+ +-----+-----+
Suffix H indicates High while the suffix L indicates Low.
In general the registers in this group can be used for various purposes, however some specific usage of each of these registers are:
Register AX, specifically used in arithmetic operations, especially in the operations division and subtraction.
Register BX, usually used to indicate an offset address of a segment.
Registers CX, used exclusively in the operation of looping where this register determines how many loops that will happen.
Registers DX , used to hold the rest of the division of 16 bits. On the 80386 processor there is an additional 32-bit registers, namely EAX, EBX, ECX and EDX
4. Index Pointer Register
Register IP paired with the CS (CS: IP) indicates the address of the memory where the instruction(command) to be executed next. Register IP is also a 16-bit registers. On the 80386 processor used EIPregister that are 32 bit registers.
5. Flags Register.
This register indicates the condition of a state <yes or no>. Since each state can use 1 bit only, then the appropriate number of bits, Flags register is capable of recording up to 16 state. The flag contained in themicroprocessor 8088 and above are:
OF <OverFlow Flag>
If there is overflow in arithmetic operations, bit it will be worth 1
SF <Sign Flag>
If this bit is marked with numbers used to be worth 1
ZF <Zero Flag>
If the results of operations produce zero, this bit will be worth 1
CF <Carry Flag>
If there is a reduction borrow or carry on operations in the summation, it would be worth a bit.
0F 0E 0D 0C 0B 0A 09 08 07 06 05 04 03 02 01 00
+-----+-----+------+------+----+-----+-----+-----+----+----+----+----+----+---+----+----+
| | NT | |OPL|OF | DF | IF | TF | SF | ZF| | AF| |PF | |CF |
+-----+-----+------+------+----+-----+-----+-----+-----+---+----+----+----+----+----+----+
arrangement of flag register 8088
PF <Parity Flag>.
Used to indicate the parity number. This bit will be worth 1 if the resulting number is an even number.
DF <Direction Flag>
Used in the operation of string to indicate the direction of the process.
IF <Interrupt Enable Flag>
CPU will ignore interrupt to occur if the bit is 0.
TF <Trap Flag>
Used primarily for debugging, the operation step by step.
AF <Auxiliary Flag>
Used by BCD operations, such as the AAA commands.
NT <Nested Task>
Used in the processor 80286 and 80 386 for keeping the interruptions that occur in a row
IOPL <I/O Protection level>
This flag consists of 2 bits and is used in the processor 80286 and 80386 for the protection mode.
The composition of each flag in the flags register you can see in the image above. At 80 286 and 80 386processor and above, there are some additional flags register, namely:
- PE <Protection Enable>
Used to activate the protection mode. This flag will be worth 1 in protection mode and 0 in real mode.
- MP <Monitor Coprosesor>
Used with the TS flag to handle the WAIT instruction.
- EM <Emulate Coprosesor>
This flag is used to simulate 80 287 or 80 387 coprosesor.
- TS <Task Switched>
This flag is available in 80 286 above.
- ET <Extension Type>
This flag is used to determine the type coprosesor 80 287 or 80 387.
- RF <Resume Flag>
Register is only available on the 80386 processor and above.
- VF <Virtual 8086 Mode>
When the flag is equal to 1 at the time of the protection mode, the microprocessor will allow the exercise ofreal mode applications in protection mode. Register is only available on 80386 or more.
TYPE OF REGISTER:
1. Registers are included in this group consists of registers CS, DS, ES and SS are respectively the 16-bitregisters. Registers in this group are generally used to indicate the address of a segment.
Register CS (Code Segment) is used to indicate the place of the current segment, while the SS register(Stack Segment) shows the location of the segments used by the stack. Both of these registers should not be any change because it would cause chaos in your program later.
Register DS (Data Segment) is usually used to show where the segment where the data is stored in theprogram. Generally the contents of these registers do not need to be changed unless the resident program.
Register ES (Extra Segment), as the name suggests is a bonus registers that do not have a specific task.ES registers areusually used to indicate an address in memory, eg video memory address.
On the 80386 processor segment registers are 16-bit addition, the FS<Extra Segment> and GS<Extra Segment>.
2. Pointer and Index Register.
Registers are included in this group are the registers SP, BP, SI and DI, each of which consists of 16 bits.Registers in this group are generally used as a pointer or a pointer to a location in memory.
Register SP (Stack Pointer) is paired with SS segment register (SS: SP) is used to mununjukkan address of the stack, while the register BP (Base Pointer) register is paired with SS (SS: BP) recorded an address inmemory where data.
Register SI (Source Index) and register DI (Destination Index) is usually used in a string operation with directaccess to the address in memory indicated by the two registers. On the 80386 processor there is an additional 32-bit registers, namely ESP, EBP, ESI and EDI.
3. General Purpose Register.
Registers are included in this group are the registers AX, BX, CX and DX, each of which consists of 16 bits.16-bit registers of this group have a characteristic, which can be separated into two parts where each partconsists of 8 bits.
+ A X + + B X + + C X + + D X +
+-+--+--+-+ +-+--+--+-+ +-+--+--+-+ +-+--+--+-+
| AH | AL | | BH | BL | | CH | CL | | DH | DL |
+---- +---- + +---- +---- + +-----+----+ +-----+-----+
Suffix H indicates High while the suffix L indicates Low.
In general the registers in this group can be used for various purposes, however some specific usage of each of these registers are:
Register AX, specifically used in arithmetic operations, especially in the operations division and subtraction.
Register BX, usually used to indicate an offset address of a segment.
Registers CX, used exclusively in the operation of looping where this register determines how many loops that will happen.
Registers DX , used to hold the rest of the division of 16 bits. On the 80386 processor there is an additional 32-bit registers, namely EAX, EBX, ECX and EDX
4. Index Pointer Register
Register IP paired with the CS (CS: IP) indicates the address of the memory where the instruction(command) to be executed next. Register IP is also a 16-bit registers. On the 80386 processor used EIPregister that are 32 bit registers.
5. Flags Register.
This register indicates the condition of a state <yes or no>. Since each state can use 1 bit only, then the appropriate number of bits, Flags register is capable of recording up to 16 state. The flag contained in themicroprocessor 8088 and above are:
OF <OverFlow Flag>
If there is overflow in arithmetic operations, bit it will be worth 1
SF <Sign Flag>
If this bit is marked with numbers used to be worth 1
ZF <Zero Flag>
If the results of operations produce zero, this bit will be worth 1
CF <Carry Flag>
If there is a reduction borrow or carry on operations in the summation, it would be worth a bit.
0F 0E 0D 0C 0B 0A 09 08 07 06 05 04 03 02 01 00
+-----+-----+------+------+----+-----+-----+-----+----+----+----+----+----+---+----+----+
| | NT | |OPL|OF | DF | IF | TF | SF | ZF| | AF| |PF | |CF |
+-----+-----+------+------+----+-----+-----+-----+-----+---+----+----+----+----+----+----+
arrangement of flag register 8088
PF <Parity Flag>.
Used to indicate the parity number. This bit will be worth 1 if the resulting number is an even number.
DF <Direction Flag>
Used in the operation of string to indicate the direction of the process.
IF <Interrupt Enable Flag>
CPU will ignore interrupt to occur if the bit is 0.
TF <Trap Flag>
Used primarily for debugging, the operation step by step.
AF <Auxiliary Flag>
Used by BCD operations, such as the AAA commands.
NT <Nested Task>
Used in the processor 80286 and 80 386 for keeping the interruptions that occur in a row
IOPL <I/O Protection level>
This flag consists of 2 bits and is used in the processor 80286 and 80386 for the protection mode.
The composition of each flag in the flags register you can see in the image above. At 80 286 and 80 386processor and above, there are some additional flags register, namely:
- PE <Protection Enable>
Used to activate the protection mode. This flag will be worth 1 in protection mode and 0 in real mode.
- MP <Monitor Coprosesor>
Used with the TS flag to handle the WAIT instruction.
- EM <Emulate Coprosesor>
This flag is used to simulate 80 287 or 80 387 coprosesor.
- TS <Task Switched>
This flag is available in 80 286 above.
- ET <Extension Type>
This flag is used to determine the type coprosesor 80 287 or 80 387.
- RF <Resume Flag>
Register is only available on the 80386 processor and above.
- VF <Virtual 8086 Mode>
When the flag is equal to 1 at the time of the protection mode, the microprocessor will allow the exercise ofreal mode applications in protection mode. Register is only available on 80386 or more.
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